Paper ID:
IJSDIP_2026_VOLUME 14_ISSUE 1_99-107
Author's Name:
Varakala Praveena, Dr. K. Jayakumar, Dr. D. Jayahar, Mr. Pinku Kumar
Volume:
14
Issue:
Issue 1
Year:
2026
Pages:
99-107
Abstract
Semiconductor technology has grown so quickly that now billion of transistors can be integrated in a single chip and this has contributed greatly to the performance of the computers. But scaling of technology in deep submicron has caused some critical issues with regard to power especially leakage currents and power consumption in the dynamic mode. These issues directly affect the battery life in portable systems, thermal reliability and performance of the system. The paper provides a detailed analysis of the low-power Complementary Metal-Oxide-Semiconductor (CMOS) design methodologies of energy efficiency in designing Very Large Scale Integration (VLSI). The work aims at minimizing dynamic power by scaling of voltage, clock gating, and reducing capacitance, and minimizing leakage power based on multi-threshold CMOS (MTCMOS), power gating, stacking transistor and adaptive body biasing.
An organized approach suggested to measure and maximize on power consumption of modern processors on both circuit and architectural level. The analysis of simulation shows that there is a considerable decrease in the total power consumption, without any significant reduction in performance. The findings are that, by using dynamic voltage scaling, with leakage control mechanisms, it is possible to attain power savings of up to 40 60 per cent in scaled CMOS technologies.
Regardless of these advances, the real world constraints in the form of greater design complexity, area overhead, wake-up latency on power gate and variation of nanoscale technologies have not been resolved. The next-generation directions of contemporary research are to combine FinFET and Gate-All-Around (GAA) technology, AI-aided power optimization, near-threshold computing, and materials able to operate in the lowest leakage. The results of the current paper can be given as a guideline to developing the next generation of energy-efficient processors to be used in high-performance and battery-powered systems.
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